The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Feb. 19, 2019
Filed:
Mar. 27, 2018
Qualcomm Incorporated, San Diego, CA (US);
Wei-Chuan Chen, San Diego, CA (US);
Xia Li, San Diego, CA (US);
Wah Nam Hsu, San Diego, CA (US);
Seung Hyuk Kang, San Diego, CA (US);
QUALCOMM Incorporated, San Diego, CA (US);
Abstract
Magnetic tunnel junction (MTJ) devices with varied breakdown voltages in different memory arrays fabricated in a same semiconductor die to facilitate different memory applications are disclosed. In exemplary aspects disclosed herein, MTJ devices are fabricated in a semiconductor die to provide at least two different memory arrays. MTJ devices in each memory array are fabricated to have different breakdown voltages. For example, it may be desired to fabricate a One-Time-Programmable (OTP) memory array in the semiconductor die using MTJ devices having a first, lower breakdown voltage, and a separate magneto-resistive random access memory (MRAM) in a same semiconductor die with MTJ devices having a higher breakdown voltage. Thus, in this example, lower breakdown voltage MTJ devices in OTP memory array require less voltage to program, while higher breakdown voltage MTJ devices in MRAM can maintain a desired write operation margin to avoid or reduce write operations causing dielectric breakdown.