The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Feb. 19, 2019
Filed:
Dec. 28, 2015
Freescale Semiconductor, Inc., Austin, TX (US);
Ray Charles Marshall, Harpenden, GB;
Nancy Hing-Che Amedeo, Austin, TX (US);
Joachim Fader, Munich, DE;
NXP USA, Inc., Austin, TX (US);
Abstract
The present application relates to a cache invalidation unit for a computing system having a processor unit, CPU, with a cache memory, a main memory and at least one an alternate bus master unit. The CPU, the main memory and the at least one an alternate bus master unit are coupled via an interconnect for data communications between them. The cache invalidation unit generates one or more invalidation requests to the cache memory in response to the alternate bus master unit writing data to the main memory. The cache invalidation unit comprises a page address generator unit to generate page addresses relating to at least one address range and an invalidation request generator unit to generate an invalidation request for each page address. The one or more generated invalidation requests are transmitted by the cache invalidation unit via to the cache memory of the CPU.