The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Feb. 19, 2019

Filed:

Dec. 22, 2011
Applicants:

Jesus Corbal San Adrian, Barcelona, ES;

Cristina S. Anderson, Hillsboro, OR (US);

Robert Valentine, Kiryat Tivon, IL;

Bret Toll, Hillsboro, OR (US);

Amit Gradstein, Binyamina, IL;

Simon Rubanovich, Haifa, IL;

Benny Eitan, Haifa, IL;

Inventors:

Jesus Corbal San Adrian, Barcelona, ES;

Cristina S. Anderson, Hillsboro, OR (US);

Robert Valentine, Kiryat Tivon, IL;

Bret Toll, Hillsboro, OR (US);

Amit Gradstein, Binyamina, IL;

Simon Rubanovich, Haifa, IL;

Benny Eitan, Haifa, IL;

Assignee:

Intel Corporation, Santa Clara, CA (US);

Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
G06F 9/30 (2018.01);
U.S. Cl.
CPC ...
G06F 9/3001 (2013.01); G06F 9/30014 (2013.01); G06F 9/30036 (2013.01);
Abstract

A method of an aspect includes receiving a floating point rounding instruction. The floating point rounding instruction indicates a source of one or more floating point data elements, indicates a number of fraction bits after a radix point that each of the one or more floating point data elements are to be rounded to, and indicates a destination storage location. A result is stored in the destination storage location in response to the floating point rounding instruction. The result includes one or more rounded result floating point data elements. Each of the one or more rounded result floating point data elements includes one of the floating point data elements of the source, in a corresponding position, which has been rounded to the indicated number of fraction bits. Other methods, apparatus, systems, and instructions are disclosed.


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