The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Feb. 19, 2019
Filed:
Dec. 12, 2014
Via Alliance Semiconductor Co., Ltd., Shanghai, CN;
VIA ALLIANCE SEMICONDUCTOR CO., LTD., Shanghai, CN;
Abstract
A graphics processing system and power gating method thereof, the graphics processing system comprising: a graphics processing unit (GPU), a bus interface and a power management unit (PMU), the GPU comprising a control circuit and a plurality of partitions; the method includes: when the bus interface receives an external graphics command, utilizing the PMU to turn on a power supply of the control circuit; subsequently utilizing the control circuit to turn on power supplies of one or more partitions of the plurality of partitions corresponding to the external graphics command; when then control circuit detects any one of the plurality of partitions is in an idle state, utilizing the control circuit to turn off the power supply of the partition in the idle state; when the bus interface detects the plurality of partitions are in a full idle state, utilizing the bus interface to turn off the power supply of the control circuit via the PMU; and when the PMU turns off the power supply of the control circuit, the control circuit may also turn off the power supplies of the plurality of the partitions.