The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Feb. 12, 2019

Filed:

Feb. 24, 2017
Applicant:

Intel Corporation, Santa Clara, CA (US);

Inventors:

Cho-Ying Lu, Hillsboro, OR (US);

William Yee Li, Portland, OR (US);

Khoa Minh Nguyen, Hillsboro, OR (US);

Ashoke Ravi, Hillsboro, OR (US);

Maneesha Yellepeddi, San Jose, CA (US);

Binta M. Patel, Austin, TX (US);

Assignee:

Intel Corporation, Santa Clara, CA (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H03L 7/06 (2006.01); H03L 7/085 (2006.01); H03L 1/00 (2006.01); H03L 7/099 (2006.01); H03L 7/08 (2006.01); H03L 7/091 (2006.01);
U.S. Cl.
CPC ...
H03L 7/085 (2013.01); H03L 1/00 (2013.01); H03L 7/08 (2013.01); H03L 7/091 (2013.01); H03L 7/0991 (2013.01); H03L 7/0992 (2013.01); H03L 2207/50 (2013.01);
Abstract

A system for assigning a characterization and calibrating a parameter is disclosed. The system includes a frequency measurement circuit and a finite state machine. The frequency measurement circuit is configured to measure frequencies of an oscillatory signal and to generate a measurement signal including measured frequencies. The finite state machine is configured to control measurements by the frequency measurement circuit, to assign a characterization to a parameter based on the measurement signal, and to generate a calibration signal based on the characterized parameter.


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