The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Feb. 12, 2019
Filed:
Jun. 25, 2015
Shenzhen China Star Optoelectronics Technology Co., Ltd., Shenzhen, CN;
Liangfen Zhang, Shenzhen, CN;
Shuichih Lien, Shenzhen, CN;
Changcheng Lo, Shenzhen, CN;
Yuanchun Wu, Shenzhen, CN;
Yuanjun Hsu, Shenzhen, CN;
Hoising Kwok, Shenzhen, CN;
Man Wong, Shenzhen, CN;
Rongsheng Chen, Shenzhen, CN;
Wei Zhou, Shenzhen, CN;
Meng Zhang, Shenzhen, CN;
SHENZHEN CHINA STAR OPTOELECTRONICS TECHNOLOGY CO., LTD., Shenzhen, Guangdong, CN;
Abstract
The present invention provides a manufacture method of a polysilicon thin film and a polysilicon TFT structure. The manufacture method of the polysilicon thin film comprises: step 1, providing a substrate (), and forming the polysilicon thin film () on the substrate (), and a thickness of the polysilicon thin film () accords with a required thickness of manufacturing a semiconductor element; step 2, implementing silicon self-ion implantation to the polysilicon thin film (), and an implantation volume of silicon ion is lower than a measurement limit for making polysilicon be decrystallized. The manufacture method of the polysilicon thin film makes the implanted silicon ion to form interstitial silicon to move to the polysilicon grain boundary, which can reduce the defect concentration of the polysilicon grain boundary and improve the quality of the polysilicon thin film. The present invention provides a polysilicon TFT structure, of which the island shaped semiconductor layer is manufactured by the polysilicon thin film after low volume silicon self-ion implantation, which can reduce the grain boundary potential barrier in the activation stage, and enlarge the carrier mobility, and increase the on state current, and decrease the threshold voltage, and improve the TFT property.