The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Feb. 05, 2019

Filed:

Sep. 14, 2017
Applicant:

Semiconductor Energy Laboratory Co., Ltd., Atsugi-shi, Kanagawa-ken, JP;

Inventors:

Shunpei Yamazaki, Tokyo, JP;

Yoshinobu Asami, Kanagawa, JP;

Yutaka Okazaki, Kanagawa, JP;

Motomu Kurata, Kanagawa, JP;

Katsuaki Tochibayashi, Kanagawa, JP;

Shinya Sasagawa, Kanagawa, JP;

Kensuke Yoshizumi, Kanagawa, JP;

Hideomi Suzawa, Kanagawa, JP;

Assignee:

Semiconductor Energy Laboratory Co., Ltd., Atsugi-shi, Kanagawa-ken, JP;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 29/49 (2006.01); H01L 29/786 (2006.01); H01L 29/66 (2006.01); H01L 21/4757 (2006.01); H01L 21/47 (2006.01); H01L 21/477 (2006.01); H01L 33/00 (2010.01); H01L 27/12 (2006.01);
U.S. Cl.
CPC ...
H01L 29/7869 (2013.01); H01L 21/47 (2013.01); H01L 21/477 (2013.01); H01L 21/4757 (2013.01); H01L 27/1207 (2013.01); H01L 27/1225 (2013.01); H01L 29/66969 (2013.01); H01L 29/78648 (2013.01); H01L 33/00 (2013.01);
Abstract

A miniaturized transistor, a transistor with low parasitic capacitance, a transistor with high frequency characteristics, or a semiconductor device including the transistor is provided. The semiconductor device includes a first insulator, an oxide semiconductor over the first insulator, a first conductor and a second conductor that are in contact with the oxide semiconductor, a second insulator that is over the first and second conductors and has an opening reaching the oxide semiconductor, a third insulator over the oxide semiconductor and the second insulator, and a fourth conductor over the third insulator. The first conductor includes a first region and a second region. The second conductor includes a third region and a fourth region. The second region faces the third region with the first conductor and the first insulator interposed therebetween. The second region is thinner than the first region. The third region is thinner than the fourth region.


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