The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Jan. 29, 2019
Filed:
Jul. 20, 2016
Applicant:
Intel Corporation, Santa Clara, CA (US);
Inventors:
Chia-Hsiang Chen, Santa Clara, CA (US);
Ching-En Lee, Hillsboro, OR (US);
Feng Xue, Redwood City, CA (US);
Shu-Ping Yeh, New Taipei, TW;
Assignee:
INTEL CORPORATION, Santa Clara, CA (US);
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H04L 5/14 (2006.01); H04B 1/44 (2006.01); H04B 15/00 (2006.01); H04B 1/525 (2015.01);
U.S. Cl.
CPC ...
H04L 5/1461 (2013.01); H04B 1/44 (2013.01); H04B 1/525 (2013.01); H04B 15/00 (2013.01);
Abstract
A communication circuit arrangement includes a signal path circuit configured to separately apply a kernel dimension filter and a delay tap dimension filter to an input signal for an amplifier to obtain an estimated interference signal, a cancelation circuit configured to subtract the estimated interference signal from a received signal to obtain a clean signal, and a filter update circuit configured to alternate between updating the kernel dimension filter and the delay tap dimension filter using the clean signal.