The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Jan. 29, 2019
Filed:
Jun. 23, 2015
Woojin Lee, Hwaseong-si, KR;
Vietha Nguyen, Yongin-si, KR;
Wookyung You, Incheon, KR;
Doo-sung Yun, Yongin-si, KR;
Hyunbae Lee, Seoul, KR;
Byunghee Kim, Seoul, KR;
Sang Hoon Ahn, Goyang-si, KR;
Seungyong Yoo, Incheon, KR;
Naein Lee, Seoul, KR;
Hoyun Jeon, Hwaseong-si, KR;
Woojin Lee, Hwaseong-si, KR;
VietHa Nguyen, Yongin-si, KR;
Wookyung You, Incheon, KR;
Doo-Sung Yun, Yongin-si, KR;
Hyunbae Lee, Seoul, KR;
Byunghee Kim, Seoul, KR;
Sang Hoon Ahn, Goyang-si, KR;
Seungyong Yoo, Incheon, KR;
Naein Lee, Seoul, KR;
Hoyun Jeon, Hwaseong-si, KR;
Samsung Electronics Co., Ltd., Gyeonggi-do, KR;
Abstract
A method of manufacturing the semiconductor device includes providing a first interlayer dielectric layer having a conductive pattern, sequentially forming a first etch stop layer, a second etch stop layer, a second interlayer dielectric layer and a mask pattern on the first interlayer dielectric layer, forming an opening in the second interlayer dielectric layer using the mask pattern as a mask, the opening exposing the second etch stop layer, and performing an etching process including simultaneously removing the mask pattern and the second etch stop layer exposed by the opening to expose the first etch stop layer.