The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jan. 29, 2019

Filed:

Jan. 17, 2017
Applicant:

Xilinx, Inc., San Jose, CA (US);

Inventors:

Aaron Ng, Santa Clara, CA (US);

Sabyasachi Das, San Jose, CA (US);

Prabal Basu, Logan, UT (US);

Assignee:

XILINX, INC., San Jose, CA (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G06F 17/50 (2006.01);
U.S. Cl.
CPC ...
G06F 17/505 (2013.01); G06F 17/5054 (2013.01); G06F 17/5068 (2013.01); G06F 17/5081 (2013.01); G06F 2217/78 (2013.01); G06F 2217/84 (2013.01);
Abstract

Physical synthesis for a circuit design can include determining, using a processor, features relating to a signal path of the circuit design not meeting a timing requirement, processing the features through a first neural network model using the processor, wherein the first neural network model is trained to indicate an effectiveness of a first physical synthesis optimization, and selectively performing, using the processor, the first physical synthesis optimization for the signal path based upon a result from the first neural network model.


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