The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Jan. 22, 2019
Filed:
Nov. 16, 2016
Intel Corporation, Santa Clara, CA (US);
Bhanu Prakash Bodi Reddy, Shannon, IE;
Jasvinder Singh, Shannon, IE;
Antonio Fischetti, Limerick, IE;
Intel Corporation, Santa Clara, CA (US);
Abstract
A virtual switch configured to switch packets between virtual switch ports based on classifier sub-tables. The virtual switch reserves blocks of last level cache for classifier sub-table storage. The virtual switch also maintains a global sub-table priority map for the classifier sub-tables. The global sub-table priority map indicates usage frequency of each classifier sub-table when switching the packets between the ports. A sub-set of the classifier sub-tables with a highest usage frequency, according to the global sub-table priority map, are pre-fetched to the reserved blocks of the last level cache. By pre-fetching the most used classifier sub-tables, memory related bottlenecks are reduced when searching through classifier sub-tables. This mechanism increases processing speed when matching packets/flows to classifier sub-tables, resulting in faster packet switching by the virtual switch. The virtual switch may leverage Cache Allocation Technology (CAT)/Code and Data Prioritization technology (CDP) to prevent cache eviction.