The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jan. 22, 2019

Filed:

Aug. 26, 2016
Applicant:

Fuji Electric Co., Ltd., Kanagawa, JP;

Inventors:

Tohru Shirakawa, Matsumoto, JP;

Tatsuya Naito, Matsumoto, JP;

Shigemi Miyazawa, Matsumoto, JP;

Assignee:

FUJI ELECTRIC CO., LTD., Kanagawa, JP;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 29/06 (2006.01); H01L 29/78 (2006.01); H01L 29/40 (2006.01); H01L 29/08 (2006.01);
U.S. Cl.
CPC ...
H01L 29/0634 (2013.01); H01L 29/086 (2013.01); H01L 29/0869 (2013.01); H01L 29/407 (2013.01); H01L 29/7802 (2013.01); H01L 29/7805 (2013.01); H01L 29/7811 (2013.01); H01L 29/7813 (2013.01); H01L 29/0878 (2013.01);
Abstract

A super junction MOSFET device including a semiconductor substrate; a base region provided on a primary surface side of the semiconductor substrate and having impurities of a first conductivity type; a source region that includes a portion of a frontmost surface of the base region and has impurities of a second conductivity type; a gate electrode that penetrates through the base region; a source electrode that is provided on the base region and is electrically connected to the source region; and a front surface region that is provided on an entirety of the frontmost surface of the base region in a region differing from a region where the source region and the gate electrode are provided in the base region, is electrically connected to the source electrode provided on the base region, and has a lower impurity concentration of impurities of the second conductivity type than the source region.


Find Patent Forward Citations

Shirakawa, Tohru. (2019). Super junction mosfet device and semiconductor chip (U.S. Patent No. 10186574). U.S. Patent and Trademark Office. https://idiyas.com/patent/badge/10186574

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile

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