The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Jan. 15, 2019
Filed:
Dec. 30, 2016
Applicant:
Intel Ip Corporation, Santa Clara, CA (US);
Inventors:
Elan Banin, Raanana, IL;
Roy Amel, Haifa, IL;
Ran Shimon, Ramat Gan, IL;
Ashoke Ravi, Hillsboro, OR (US);
Nati Dinur, Haifa, IL;
Assignee:
Intel IP Corporation, Santa Clara, CA (US);
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H03L 7/08 (2006.01); H04L 27/00 (2006.01); H03L 7/085 (2006.01);
U.S. Cl.
CPC ...
H03L 7/08 (2013.01); H03L 7/085 (2013.01); H04L 27/0014 (2013.01); H04L 2027/0053 (2013.01); H04L 2027/0067 (2013.01);
Abstract
A Digital Phase Locked Loop (DPLL), including a Time-to-Digital Converter (TDC) configured generate quantized phase values of a Voltage Controlled Oscillator (VCO) signal; and a frequency estimation circuit configured to receive the quantized phase values, determine wraparound phase of the quantized phase values, and least-squares estimate a frequency based on the quantized phase values and the wraparound phase.