The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jan. 08, 2019

Filed:

May. 09, 2017
Applicant:

Unimicron Technology Corp., Taoyuan, TW;

Inventors:

Ra-Min Tain, Hsinchu County, TW;

Kai-Ming Yang, Hsinchu County, TW;

Chien-Tsai Li, Hsinchu County, TW;

Assignee:
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H05K 1/02 (2006.01); H05K 1/11 (2006.01);
U.S. Cl.
CPC ...
H05K 1/0209 (2013.01); H05K 1/114 (2013.01); H05K 2201/0116 (2013.01); H05K 2201/0195 (2013.01); H05K 2201/041 (2013.01);
Abstract

A circuit board includes a first dielectric layer, a first circuit layer, a second circuit layer, a plurality of conductive vias, a second dielectric layer, a patterned seed layer, and a plurality of bonding layers. The first circuit layer is disposed in the first dielectric layer. The second circuit layer is disposed on the first dielectric layer. The conductive vias are disposed in the first dielectric layer and connect the first circuit layer to the second circuit layer. The second dielectric layer is disposed on the first dielectric layer and the second circuit layer and has a plurality of openings to expose a plurality of parts of the second circuit layer. The patterned seed layer is disposed on the exposed parts of second circuit layer and sidewalls of the openings. The bonding layers are respectively disposed on the patterned seed layer and made of porous copper.


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