The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Jan. 08, 2019
Filed:
Jun. 20, 2017
Applicant:
Cadence Design Systems, Inc., San Jose, CA (US);
Inventors:
Sumanth Chakkirala, Bangalore, IN;
Tamal Das, Bangalore, IN;
Vishnu Kalyanamahadevi Goplalan Jawarlal, Bangalore, IN;
Assignee:
Cadence Design Systems, Inc., San Jose, CA (US);
Primary Examiner:
Int. Cl.
CPC ...
H04L 25/02 (2006.01); H04B 1/40 (2015.01); G01R 31/28 (2006.01); H04L 25/49 (2006.01);
U.S. Cl.
CPC ...
H04L 25/0292 (2013.01); G01R 31/2851 (2013.01); H04B 1/40 (2013.01); H04L 25/0272 (2013.01); H04L 25/49 (2013.01);
Abstract
The present disclosure relates to an apparatus for use in a transition-minimized differential signaling link ('TMDS') receiver. The apparatus may include an integrated circuit electrically connected with a voltage supply. The integrated circuit may include a first transistor, a second transistor, and a resistor arranged in a cascaded configuration along a termination path. The first transistor may include calibration code control configured to adjust an output impedence.