The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jan. 08, 2019

Filed:

May. 02, 2017
Applicant:

Intel Ip Corporation, Santa Clara, CA (US);

Inventors:

Avi Gazneli, Rehovot, IL;

Michael Kerner, Tel Mond, IL;

Amir Rubin, Kiryat Ono, IL;

Itay Almog, Ganey Tikva, IL;

Avi Sulimarski, Kfar Oranim, IL;

Assignee:

Intel IP Corporation, Santa Clara, CA (US);

Attorneys:
Primary Examiner:
Int. Cl.
CPC ...
H03F 1/32 (2006.01); H03F 3/20 (2006.01); H03F 1/30 (2006.01); H03F 3/195 (2006.01); H03F 3/24 (2006.01);
U.S. Cl.
CPC ...
H03F 1/3247 (2013.01); H03F 1/30 (2013.01); H03F 1/3258 (2013.01); H03F 3/195 (2013.01); H03F 3/20 (2013.01); H03F 3/245 (2013.01); H03F 2200/102 (2013.01); H03F 2200/105 (2013.01); H03F 2200/294 (2013.01); H03F 2200/447 (2013.01); H03F 2200/465 (2013.01); H03F 2200/468 (2013.01); H03F 2201/3224 (2013.01); H03F 2201/3233 (2013.01);
Abstract

A method for predistorting an input signal of an amplifier device comprises evaluating a selection criterion for a computational model of the amplifier device. The computational model provides an output signal of the amplifier device for the input signal of the amplifier device. Further, the method comprises selecting between a first computational model of the amplifier device and a second computational model of the amplifier device based on the evaluated selection criterion. Additionally, the method comprises predistorting the input signal of the amplifier device using the selected computational model.


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