The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Jan. 01, 2019
Filed:
Jun. 30, 2017
Applicant:
Taiwan Semiconductor Manufacturing Co., Ltd., Hsinchu, TW;
Inventors:
Chi-Feng Huang, Hsinchu County, TW;
Chia-Chung Chen, Keelung, TW;
Victor Chiang Liang, Hsinchu, TW;
Meng-Chang Ho, Taichung, TW;
Chung-Hao Chu, Hsinchu, TW;
Tz-Hau Guo, Taichung, TW;
Assignee:
Taiwan Semiconductor Manufacturing Co., Ltd., Hsinchu, TW;
Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H01L 29/78 (2006.01); H01L 29/423 (2006.01); H01L 27/088 (2006.01); H01L 21/8234 (2006.01);
U.S. Cl.
CPC ...
H01L 29/42324 (2013.01); H01L 21/823437 (2013.01); H01L 27/088 (2013.01); H01L 29/78 (2013.01);
Abstract
A semiconductor device includes a composite gate structure formed over a semiconductor substrate. The composite gate structure includes a gate dielectric layer, a metal feature, and a semiconductor feature. The metal feature is disposed on the gate dielectric layer. The semiconductor feature is disposed on the gate dielectric layer. The metal feature and the semiconductor feature are stacked on the gate dielectric layer side by side.