The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Jan. 01, 2019
Filed:
Mar. 18, 2016
Applicant:
Intel Corporation, Santa Clara, CA (US);
Inventors:
Zhenyu Zhu, Folsom, CA (US);
Anoop Mukker, Folsom, CA (US);
Daniel Nemiroff, El Dorado Hills, CA (US);
Nobuyuki Suzuki, Portland, OR (US);
David W. Vogel, Sacramento, CA (US);
Assignee:
Intel Corporation, Santa Clara, CA (US);
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G06F 1/00 (2006.01); G06F 1/32 (2006.01); G06F 1/26 (2006.01);
U.S. Cl.
CPC ...
G06F 1/3234 (2013.01); G06F 1/266 (2013.01); G06F 1/325 (2013.01); G06F 1/3206 (2013.01); Y02D 50/20 (2018.01);
Abstract
An example method for power management of a user interface includes initiating a low power entry at a data lane of the user interface. The method further includes coordinating with a peripheral device to enter into an ultra-low power state. The peripheral device is to initiate a low power entry at the clock lane to enter the user interface into an ultra-low power state in response to detecting the low power entry at the data lane.