The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Dec. 25, 2018
Filed:
Nov. 24, 2017
Texas Instruments Incorporated, Dallas, TX (US);
Youhao Xi, Chandler, AZ (US);
Eric Wayne Tisinger, Chandler, AZ (US);
TEXAS INSTRUMENTS INCORPORATED, Dallas, TX (US);
Abstract
An SMPS current mode control loop with an adjusted cycle-by-cycle peak current limit for buck and boost (and bidirectional buck/boost) regulators. An SMPS regulator can include a PWM driver to drive switching control signals with a PWM duty cycle to an output terminal OUT, and a PWM controller to control the PWM duty cycle based on a current mode control loop that includes slope compensation to provide a signal VPK corresponding to a current sense signal from a current sense terminal CS, based on sensed peak current through the energy storage element, superimposed with an injected slope compensation current corresponding to a predefined slope compensation based on PWM duty cycle. Adjusted peak limit circuitry generates a signal VLMT corresponding to an adjusted peak current limit based on a pre-defined peak current limit threshold for the energy storage element, including generating a peak limit adjustment current corresponding to the injected slope compensation current, and combining the peak limit adjustment current with the pre-defined peak current limit threshold so that VLMT is substantially constant.