The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Dec. 25, 2018
Filed:
Aug. 25, 2017
Applicant:
Neo Semiconductor, Inc., San Jose, CA (US);
Inventor:
Fu-Chang Hsu, San Jose, CA (US);
Assignee:
NEO Semiconductor, Inc., San Jose, CA (US);
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G11C 14/00 (2006.01); G11C 16/08 (2006.01); G11C 16/04 (2006.01); G11C 16/26 (2006.01); G11C 11/4096 (2006.01); G11C 16/10 (2006.01); G11C 7/10 (2006.01);
U.S. Cl.
CPC ...
G11C 14/0018 (2013.01); G11C 11/4096 (2013.01); G11C 16/0483 (2013.01); G11C 16/08 (2013.01); G11C 16/10 (2013.01); G11C 16/26 (2013.01); G11C 7/1039 (2013.01);
Abstract
A memory device is able to store data using both on-chip dynamic random-access memory ('DRAM') and nonvolatile memory ('NVM'). The memory device, in one aspect, includes NVM cells, word lines (“WLs”), a cell channel, and a DRAM mode select. The NVM cells are capable of retaining information persistently and the WLs are configured to select one of the NVM cells to be accessed. The cell channel, in one embodiment, is configured to interconnect the NVM cells to form a NVM string. The DRAM mode select can temporarily store data in the cell channel when the DRAM mode select is active.