The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Dec. 25, 2018

Filed:

Oct. 15, 2014
Applicant:

Advantest Corporation, Tokyo, JP;

Inventors:

Ben Rogel-Favila, San Jose, CA (US);

Roland Wolff, Santa Rosa, CA (US);

Eric Kushnick, San Jose, CA (US);

James Fishman, Dublin, CA (US);

Assignee:
Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
G01R 31/01 (2006.01); G01R 1/04 (2006.01); G01R 31/26 (2014.01); G01R 31/28 (2006.01); G01R 1/44 (2006.01); B25J 9/00 (2006.01); G11B 19/04 (2006.01);
U.S. Cl.
CPC ...
G01R 1/04 (2013.01); B25J 9/0084 (2013.01); B25J 9/0093 (2013.01); G01R 1/44 (2013.01); G01R 31/26 (2013.01); G01R 31/2801 (2013.01); G01R 31/2851 (2013.01); G01R 31/2893 (2013.01); G11B 19/048 (2013.01);
Abstract

In an embodiment, a universal test cell includes a plurality of test slots configured to receive a plurality of universal test containers each including similar dimensions. Each universal test container is configured to enclose each of a plurality of different devices to test. Each universal test container includes an external electrical interface configured to couple to each of the plurality of different devices to test. The universal test cell is configured to test the plurality of different devices while each is located within a universal test container of the plurality of universal test containers. The universal test cell includes a plurality of universal electrical interfaces that are each configured to couple with the external electrical interface of each universal test container.


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