The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Dec. 18, 2018

Filed:

Oct. 12, 2017
Applicant:

Taiwan Semiconductor Manufacturing Co., Ltd., Hsinchu, TW;

Inventors:

Chih-Pin Tsao, Hsinchu County, TW;

Wei-Fang Chen, Hsinchu, TW;

Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H01L 21/02 (2006.01); H01L 21/768 (2006.01); H01L 21/8234 (2006.01); H01L 23/532 (2006.01); H01L 27/088 (2006.01); H01L 27/12 (2006.01); H01L 29/165 (2006.01); H01L 29/417 (2006.01); H01L 29/66 (2006.01); H01L 29/78 (2006.01);
U.S. Cl.
CPC ...
H01L 23/53295 (2013.01); H01L 21/76816 (2013.01); H01L 21/76829 (2013.01); H01L 21/76832 (2013.01); H01L 21/76834 (2013.01); H01L 21/76877 (2013.01); H01L 21/823431 (2013.01); H01L 21/823475 (2013.01); H01L 27/0886 (2013.01); H01L 27/1211 (2013.01); H01L 29/41791 (2013.01); H01L 29/66795 (2013.01); H01L 29/785 (2013.01); H01L 29/7831 (2013.01); H01L 21/0217 (2013.01); H01L 21/02126 (2013.01); H01L 21/02164 (2013.01); H01L 21/76831 (2013.01); H01L 23/53209 (2013.01); H01L 23/53233 (2013.01); H01L 23/53257 (2013.01); H01L 29/165 (2013.01); H01L 29/7848 (2013.01);
Abstract

A semiconductor device includes a semiconductor substrate having a fin structure. A gate structure is disposed over the fin structure. A first dielectric layer is disposed on the gate structure and the fin structure. A contact plug is disposed in the first dielectric layer and electrically connected to source/drain region in the fin structure. A second dielectric layer is disposed on the first dielectric layer. the second dielectric layer has a first nitride layer and a first etch stop layer, and the first nitride layer is disposed on the first etch stop layer. A via goes through the second dielectric layer and electrically connected to the contact plug. A metal layer is disposed on the second dielectric layer.


Find Patent Forward Citations

Tsao, Chih-Pin. (2018). Finfet device having oxide layer among interlayer dielectric layer (U.S. Patent No. 10157844). U.S. Patent and Trademark Office. https://idiyas.com/patent/badge/10157844

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile

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