The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Dec. 18, 2018
Filed:
Sep. 03, 2017
Applicant:
United Microelectronics Corp., Hsin-Chu, TW;
Inventors:
Ming-Siou Wu, Kaohsiung, TW;
Tsung-Hsun Wu, Kaohsiung, TW;
Assignee:
UNITED MICROELECTRONICS CORP., Hsin-Chu, TW;
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G11C 11/00 (2006.01); G11C 11/412 (2006.01); H01L 27/11 (2006.01); G11C 11/419 (2006.01); H01L 29/66 (2006.01); H01L 29/08 (2006.01); H01L 29/78 (2006.01);
U.S. Cl.
CPC ...
G11C 11/412 (2013.01); G11C 11/419 (2013.01); H01L 27/1104 (2013.01); H01L 29/0847 (2013.01); H01L 29/66977 (2013.01); H01L 29/785 (2013.01);
Abstract
The present invention provides a memory cell. The memory cell includes a static random access memory (SRAM) cell located on a substrate. The SRAM cell includes a first storage node. At least one tunneling field-effect transistor (TFET), the gate of the tunneling field-effect transistor is electrically connected to the first storage node of the SRAM cell. A read bit line (RBL) electrically connected the drain of the TFET. A read terminal which is connected to a read port voltage (Vrp) and electrically connects to a source of the TFET.