The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Dec. 11, 2018

Filed:

Jan. 23, 2017
Applicant:

Intel Corporation, Santa Clara, CA (US);

Inventors:

Daniel Greenspan, Jerusalem, IL;

Asaf Rubinstein, Tel-Aviv, IL;

Julius Yuli Mandelblat, Haifa, IL;

Assignee:

Intel Corporation, Santa Clara, CA (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H03M 13/29 (2006.01); H03M 13/05 (2006.01); H03M 13/45 (2006.01); G06F 11/10 (2006.01); H03M 13/19 (2006.01);
U.S. Cl.
CPC ...
H03M 13/2942 (2013.01); G06F 11/1076 (2013.01); H03M 13/05 (2013.01); H03M 13/451 (2013.01); H03M 13/19 (2013.01);
Abstract

Integrated circuits, systems and methods are disclosed in which data bits protected by error correction code (ECC) detection and correction may be increased such that a combination of primary and additional bits may also be ECC protected using existing ECC allocation, without affecting ECC capabilities. For example, the additional bits may be encoded into phantom bits that are in turn used in combination with the primary bits, to generate an ECC. This ECC may then be combined with the primary bits to form a code word. The code word may be transmitted (or stored) so that when the data bits are received (or retrieved), assumed values of the phantom bits may be decoded, using the ECC, back into the additional bits without the phantom bits or the additional bits ever having transmitted (or stored).


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