The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Dec. 11, 2018

Filed:

Mar. 03, 2017
Applicant:

United Microelectronics Corp., Hsin-Chu, TW;

Inventors:

Tan-Ya Yin, Nantou County, TW;

Ming-Jui Chen, Tainan, TW;

Chia-Wei Huang, Kaohsiung, TW;

Yu-Cheng Tung, Kaohsiung, TW;

Chin-Sheng Yang, Hsinchu, TW;

Assignee:
Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H01L 23/522 (2006.01); H01L 23/528 (2006.01); H01L 27/02 (2006.01); H01L 27/11 (2006.01); G11C 11/417 (2006.01); G11C 11/412 (2006.01);
U.S. Cl.
CPC ...
G11C 11/417 (2013.01); G11C 11/412 (2013.01); H01L 23/528 (2013.01); H01L 23/5226 (2013.01); H01L 27/0207 (2013.01); H01L 27/1104 (2013.01);
Abstract

A static random access memory unit structure and layout structure includes two pull-up transistors, two pull-down transistors, two slot contact plugs, and two metal-zero interconnects. Each metal-zero interconnect is disposed on each slot contact plug and a gate of each pull-up transistor, in which, each slot contact plug crosses a drain of each pull-down transistor and a drain of each pull-up transistor and extends to cross an end of each metal-zero interconnect. A gap between the slot contact plugs is smaller than a gap between the metal-zero interconnects.


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