The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Dec. 11, 2018

Filed:

Mar. 23, 2018
Applicant:

Renesas Electronics Corporation, Tokyo, JP;

Inventors:

Yoshiyuki Nakamura, Tokyo, JP;

Tomoaki Tamura, Tokyo, JP;

Kouichi Kumaki, Tokyo, JP;

Assignee:
Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
G01R 31/28 (2006.01); H01L 21/66 (2006.01); H01L 23/00 (2006.01);
U.S. Cl.
CPC ...
G01R 31/2855 (2013.01); G01R 31/2894 (2013.01); H01L 22/14 (2013.01); H01L 22/20 (2013.01); H01L 24/95 (2013.01);
Abstract

A semiconductor device manufacturing method includes forming a plurality of semiconductor chips on a main surface of a semiconductor wafer, electrically testing each of the semiconductor chips, dicing the semiconductor wafer into individual semiconductor chips and assembling each of the semiconductor chips into a package to be a semiconductor device, subjecting the packages to a burn-in test, determining whether each of the semiconductor chips requires the burn-in test to be performed, and generating a determination model for determining whether the semiconductor chips require the burn-in test to be performed.


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