The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Dec. 04, 2018
Filed:
Jul. 24, 2017
Quicklogic Corporation, Sunnyvale, CA (US);
Pinaki Chakrabarti, Bangalore, IN;
Wilma W. Shiao, San Jose, CA (US);
Ket-Chong Yap, San Ramon, CA (US);
Vishnu A. Patil, Bangalore, IN;
Lalit Narain Sharma, Bengaluru, IN;
QuickLogic Corporation, Sunnyvale, CA (US);
Abstract
A programmable logic device uses power island based design partitioning. Each power islands includes a plurality of programmable logic cells and a programmable routing network configurable to interconnect the plurality of programmable logic cells and configurable to interconnect with at least one other power island. When a power island is in an OFF state, the programmable logic cells within the power island are powered OFF. Feed-through routing connectors in the power island, however, may be statically or dynamically powered ON independently of the powered OFF state of the power island.