The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Nov. 27, 2018
Filed:
Jan. 17, 2017
Applicant:
Samsung Electronics Co., Ltd., Suwon-si, KR;
Inventors:
Jae-eun Lee, Hwaseong-si, KR;
Sung-hoon Kim, Seongnam-si, KR;
Jae-ick Son, Hwaseong-si, KR;
Hyang-ja Yang, Seoul, KR;
Assignee:
SAMSUNG ELECTRONICS CO., LTD., Samsung-ro, Yeongtong-gu, Suwon-si, Gyeonggi-do, KR;
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G06F 17/50 (2006.01); G11C 16/04 (2006.01); H01L 27/115 (2017.01);
U.S. Cl.
CPC ...
G06F 17/5081 (2013.01); G11C 16/0483 (2013.01); H01L 27/115 (2013.01); G06F 2217/06 (2013.01);
Abstract
A method and system for verifying a layout of an integrated circuit (IC) is disclosed. The IC may include a plurality of strings each including a plurality of memory cells which are vertically stacked on a substrate. The method may include receiving schematic data of the IC including instances of a string symbol and layout data, preparing a layout versus schematic (LVS) rule file in which a string device is defined, and performing LVS verification.