The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Nov. 20, 2018

Filed:

Mar. 16, 2017
Applicant:

Intel Corporation, Santa Clara, CA (US);

Inventor:

Hyoung Il Kim, Folsom, CA (US);

Assignee:

Intel Corporatin, Santa Clara, CA (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 25/10 (2006.01); H01L 25/00 (2006.01);
U.S. Cl.
CPC ...
H01L 25/105 (2013.01); H01L 25/50 (2013.01); H01L 2225/1041 (2013.01); H01L 2225/1058 (2013.01);
Abstract

A multi-package integrated circuit assembly can include a first electronic package having a first package substrate including a first die side and a first interface side. A first die can be electrically coupled to the first die side. A second electronic package can include a second package substrate having a second die side and a second interface side. A second die can be electrically coupled to the second die side. A metallic plated hole can be electrically coupled from the interface side of the first package substrate to the interface side of the second package substrate. A collective substrate can be attached to the first electronic package. For instance, the collective substrate can be located on a face of the first electronic package opposing the first package substrate. The collective substrate is electrically coupled to the first die and the second die through the first package substrate.


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