The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Nov. 20, 2018
Filed:
Sep. 29, 2016
Applicant:
Maxim Integrated Products, Inc., San Jose, CA (US);
Inventors:
Vivek S. Sridharan, Lewisville, TX (US);
Amit S. Kelkar, Flower Mound, TX (US);
Sriram Muthukumar, Allen, TX (US);
Assignee:
MAXIM INTEGRATED PRODUCTS, INC., San Jose, CA (US);
Attorneys:
Primary Examiner:
Int. Cl.
CPC ...
H01L 23/00 (2006.01); H01L 21/683 (2006.01); H01L 23/58 (2006.01);
U.S. Cl.
CPC ...
H01L 23/562 (2013.01); H01L 21/6836 (2013.01); H01L 23/585 (2013.01); H01L 24/13 (2013.01); H01L 2221/68327 (2013.01); H01L 2224/13017 (2013.01); H01L 2224/13111 (2013.01); H01L 2224/13139 (2013.01); H01L 2224/13147 (2013.01); H01L 2224/13155 (2013.01);
Abstract
A wafer level package device and method are disclosed that include a warpage compensation metal adhered to a backside of a semiconductor wafer for minimizing warpage of the semiconductor wafer, where multiple metal features have been formed on the device side of the semiconductor substrate. The warpage compensation metal may include a copper film.