The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Nov. 20, 2018
Filed:
May. 26, 2016
Applicant:
Dongfang Jingyuan Electron Limited, Beijing, CN;
Inventors:
Weimin Ma, Beijing, CN;
Weiqiang Sun, Beijing, CN;
Assignee:
Dongfang Jingyuan Electron Limited, Beijing, CN;
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01J 37/26 (2006.01); H01J 37/20 (2006.01); H01J 37/28 (2006.01); H01J 37/18 (2006.01); G03F 1/86 (2012.01); G03F 7/20 (2006.01); H01L 21/66 (2006.01);
U.S. Cl.
CPC ...
H01J 37/20 (2013.01); G03F 1/86 (2013.01); G03F 7/7065 (2013.01); H01J 37/18 (2013.01); H01J 37/265 (2013.01); H01J 37/28 (2013.01); H01J 2237/063 (2013.01); H01J 2237/18 (2013.01); H01J 2237/2002 (2013.01); H01J 2237/202 (2013.01); H01J 2237/2007 (2013.01); H01J 2237/20292 (2013.01); H01J 2237/24571 (2013.01); H01J 2237/2817 (2013.01); H01L 22/12 (2013.01);
Abstract
Techniques for yield management in semiconductor inspection systems are described. According to one aspect of the present invention, an electron beam inspection system includes multiple stages or multiple chambers, where the chambers/stages (N≥2) are organized to form one or more paths for wafer/mask inspection. An inspection procedure in each chamber (or at each stage) is determined by its order in the path and the relative columns used. For a system with N chambers/stages, a maximum number of N wafers/masks can be processed simultaneously.