logo

For the Inventor, By the Inventor

The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Patent No.:

US 10133331 B1

PDFFull Text
Date of Patent:
Nov. 20, 2018

Filed:

Oct. 22, 2015

Mixed cell type battery module and uses thereof

Applicant:

Intel Corporation, Santa Clara, CA (US);

Inventors:

Tawfik M. Rahal-Arabi, Tigard, OR (US);

Alexander B. Uan-Zo-Li, Hillsboro, OR (US);

Mark MacDonald, Beaverton, OR (US);

Vivek M. Paranjape, Hillsboro, OR (US);

Andy Keates, Los Gatos, CA (US);

Don J. Nguyen, Portland, OR (US);

Assignee:

INTEL CORPORATION, Santa Clara, CA (US);

Attorney:
Primary Examiner:

Stefan Stoynov

Int. Cl.
CPC ...
G06F 1/32 (2006.01); H01M 10/42 (2006.01); H01M 10/48 (2006.01); H02J 9/04 (2006.01); H04W 52/02 (2009.01); H01M 16/00 (2006.01); G06F 1/26 (2006.01); G06F 1/28 (2006.01);
U.S. Cl.
CPC ...
G06F 1/3203 (2013.01); G06F 1/263 (2013.01); G06F 1/28 (2013.01); G06F 1/324 (2013.01); G06F 1/3206 (2013.01); G06F 1/3212 (2013.01); G06F 1/3234 (2013.01); G06F 1/3296 (2013.01); H01M 10/4207 (2013.01); H01M 10/4257 (2013.01); H01M 10/482 (2013.01); H01M 10/486 (2013.01); H01M 16/00 (2013.01); H02J 9/04 (2013.01); H04W 52/0261 (2013.01); H01M 2010/4271 (2013.01); Y02D 10/126 (2018.01); Y02D 10/172 (2018.01); Y02D 10/174 (2018.01); Y02D 70/00 (2018.01); Y02D 70/1224 (2018.01); Y02D 70/1244 (2018.01); Y02D 70/1246 (2018.01); Y02D 70/1262 (2018.01); Y02D 70/144 (2018.01); Y02D 70/146 (2018.01); Y02D 70/162 (2018.01); Y10T 307/625 (2015.04);
Abstract

Various embodiments are generally directed to operation of a computing device powered with first and second sets of energy storage cells, the cells of the first set structurally optimized for higher density storage of electric power, and the cells of the second set structurally optimized for providing electric power at a high electric current level. A battery module includes a casing, a first cell disposed within the casing to store electric energy with a high density, and a second cell disposed within the casing to provide electric energy stored therein with a high current level. Other embodiments are described and claimed herein.

Find Patent Forward Citations

Loading…