The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Nov. 20, 2018
Filed:
Oct. 28, 2016
Freescale Semiconductor, Inc., Austin, TX (US);
Richard Kenneth Glaeser, Lakeway, TX (US);
Mickey Mitchell Bowers, Dripping Springs, TX (US);
NXP USA, Inc., Austin, TX (US);
Abstract
A method for stress testing a device under test (DUT) having a plurality of pins includes generating a stress test pattern which independently stresses each pin of the plurality of pins, wherein the stress test pattern includes a plurality of test vector, and applying each test vector to the plurality of pins for a predetermined amount of time. The method further includes, after applying all the test vectors of the stress test pattern, applying a programmable load to each pin independently and after applying each programmable load, comparing an output voltage of each pin to a predetermined voltage range to form an output vector for each pin.
Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile