The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Nov. 13, 2018
Filed:
Oct. 25, 2017
Fuji Electric Co., Ltd., Kanagawa, JP;
Ryoichi Kato, Matsumoto, JP;
Hiromichi Gohara, Matsumoto, JP;
Takafumi Yamada, Matsumoto, JP;
Kohei Yamauchi, Matsumoto, JP;
Tatsuhiko Asai, Hino, JP;
Yoshitaka Nishimura, Azumino, JP;
Akio Kitamura, Matsumoto, JP;
Hajime Masubuchi, Shiojiri, JP;
Souichi Yoshida, Matsumoto, JP;
FUJI ELECTRIC CO., LTD., Kanagawa, JP;
Abstract
A semiconductor device including a semiconductor element, an upper-surface electrode provided on an upper surface of the semiconductor element, a plated layer provided on an upper surface of the upper-surface electrode, one or more gate runners penetrating the plated layer and provided to extend in a predetermined direction on the upper surface of the semiconductor element, and a metal connecting plate that is arranged above the plated layer and is electrically connected to the upper-surface electrode, wherein the metal connecting plate has a joint portion parallel to the upper surface of the semiconductor element and has a rising portion that is connected to a first end of the joint portion and extends in a direction away from the upper surface of the semiconductor element, and in a plane parallel to the upper surface of the semiconductor element, the rising portion and the gate runner do not overlap with each other.