The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Nov. 06, 2018
Filed:
Apr. 24, 2018
Taiwan Semiconductor Manufacturing Company, Ltd., Hsinchu, TW;
Yu-Hao Hu, Kaohsiung, TW;
Yi-Tzu Chen, Hsinchu, TW;
Hao-I Yang, Hsinchu, TW;
Cheng-Jen Chang, Taoyuan, TW;
Geng-Cing Lin, Taipei, TW;
TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD., Hsinchu, TW;
Abstract
A memory array includes a first column of memory cells, a second column of memory cells, a first pre-charge circuit, a second pre-charge circuit and a set of input output circuits. The first column of memory cells includes a first bit line, a first word line and a first bit line bar. The second column of memory cells includes the first bit line bar, a second word line and a second bit line. The first pre-charge circuit is coupled to the first bit line. The second pre-charge circuit is coupled to the first bit line bar. The first column of memory cells and the second column of memory cells are configured to share the first bit line bar. The first bit line and the first bit line bar are in a first plane. At least a portion of the first word line and at least a portion of the second word line are in a second plane intersecting the first plane.