The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Nov. 06, 2018

Filed:

Sep. 07, 2016
Applicants:

Advanced Micro Devices, Inc., Sunnyvale, CA (US);

Ati Technologies Ulc, Markham, CA;

Inventors:

Stephen V. Kosonocky, Ft. Collins, CO (US);

Thomas Burd, Fremont, CA (US);

Adam Clark, Victoria, CA;

Larry D. Hewitt, Austin, TX (US);

John Vincent Faricelli, Stow, MA (US);

John P. Petry, San Diego, CA (US);

Assignees:

Advanced Micro Devices, Inc., Santa Clara, CA (US);

ATI Technologies ULC, Markham, CA;

Attorneys:
Primary Examiner:
Int. Cl.
CPC ...
G06F 1/32 (2006.01); G01R 31/28 (2006.01); G06F 11/00 (2006.01); G06F 11/34 (2006.01);
U.S. Cl.
CPC ...
G06F 1/3209 (2013.01); G01R 31/2856 (2013.01); G01R 31/2874 (2013.01); G06F 1/3206 (2013.01); G06F 1/3234 (2013.01); G06F 11/008 (2013.01); G06F 11/3409 (2013.01);
Abstract

A system and method for managing operating modes within a semiconductor chip for optimal power and performance while meeting a reliability target are described. A semiconductor chip includes a functional unit and a corresponding reliability monitor. The functional unit provides actual usage values to the reliability monitor. The reliability monitor determines expected usage values based on a reliability target and the age of the semiconductor chip. The reliability monitor compares the actual usage values and the expected usage values. The result of this comparison is used to increase or decrease current operational parameters.


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