The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Oct. 30, 2018
Filed:
Dec. 06, 2016
Applicant:
Sandisk Technologies Llc, Plano, TX (US);
Inventors:
Chao Feng Yeh, Yokkaichi, JP;
TianChen Dong, Yokkaichi, JP;
Assignee:
SanDisk Technologies LLC, Addison, TX (US);
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 21/762 (2006.01); H01L 21/764 (2006.01); H01L 29/06 (2006.01); H01L 29/78 (2006.01); H01L 23/528 (2006.01); H01L 29/66 (2006.01); H01L 27/24 (2006.01); H01L 45/00 (2006.01); H01L 27/11582 (2017.01);
U.S. Cl.
CPC ...
H01L 29/7827 (2013.01); H01L 23/528 (2013.01); H01L 27/11582 (2013.01); H01L 27/2454 (2013.01); H01L 29/0649 (2013.01); H01L 29/6656 (2013.01); H01L 29/66666 (2013.01); H01L 45/06 (2013.01); H01L 45/1233 (2013.01);
Abstract
A method is provided that includes forming a first vertically-oriented transistor above a substrate, the first vertically-oriented transistor comprising a first sidewall gate disposed in a first direction, forming a second vertically-oriented transistor above the substrate, the second vertically-oriented transistor including a second sidewall gate disposed in the first direction, and forming an air gap chamber above the substrate disposed between the first sidewall gate and the second sidewall gate, and extending in the first direction, the air gap chamber including an air gap.