The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Oct. 30, 2018
Filed:
Jun. 16, 2017
Sandisk Technologies Llc, Plano, TX (US);
Qui Nguyen, San Jose, CA (US);
Alexander Chu, San Francisco, CA (US);
Kenneth Louie, Sunnyvale, CA (US);
Anirudh Amarnath, San Jose, CA (US);
Jixin Yu, Yokkaichi, JP;
Yen-Lung Jason Li, San Jose, CA (US);
Tai-Yuan Tseng, Milpitas, CA (US);
Jong Yuh, Pleasanton, CA (US);
SANDISK TECHNOLOGIES LLC, Plano, TX (US);
Abstract
Apparatuses, systems, and methods are disclosed for three-dimensional non-volatile memory. A stack of word line layers includes word lines for a three-dimensional non-volatile memory array. A stack of word line layers may include a plurality of tiers. Word line switch transistors transfer word line bias voltages to the word lines. Word line contact regions couple word line switch transistors to word lines. A word line contact region includes a stepped structure for a tier of word line layers. A level region separates a word line contact region for a first tier from a word line contact region for a second tier.