The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Oct. 23, 2018

Filed:

Mar. 07, 2017
Applicant:

Xilinx, Inc., San Jose, CA (US);

Inventors:

Brian C. Gaide, Erie, CO (US);

John G. O'Dwyer, Maynooth, IE;

Assignee:

XILINX, INC., San Jose, CA (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H03K 3/011 (2006.01); H03K 5/15 (2006.01); H03K 5/19 (2006.01); H03K 5/00 (2006.01);
U.S. Cl.
CPC ...
H03K 3/011 (2013.01); H03K 5/1508 (2013.01); H03K 5/19 (2013.01); H03K 2005/00143 (2013.01);
Abstract

An apparatus for clock deskew includes: a first delay element configured to receive a clock signal from a clock, wherein the delay element comprises multiple delay lines; a first multiplexer coupled to the multiple delay lines; a sensor configured to sense a voltage, a temperature, or both, and to provide a sensor output based at least on the sensed voltage and/or the sensed temperature; and a converter configured to receive the sensor output, and to generate a converted signal; wherein the first multiplexer is configured to provide a delay line output from one of the multiple delay lines based at least in part on the converted signal.


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