The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Oct. 23, 2018

Filed:

Jun. 25, 2015
Applicant:

Intel Corporation, Santa Clara, CA (US);

Inventors:

David M. Durham, Beaverton, OR (US);

Siddhartha Chhabra, Hillsboro, OR (US);

Men Long, Beaverton, OR (US);

Eugene M. Kishinevsky, Hillsboro, OR (US);

Assignee:

Intel Corporation, Santa Clara, CA (US);

Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
G06F 11/30 (2006.01); G06F 12/14 (2006.01); G06F 12/0864 (2016.01); H04L 9/32 (2006.01);
U.S. Cl.
CPC ...
G06F 12/1408 (2013.01); G06F 12/0864 (2013.01); H04L 9/3242 (2013.01); G06F 2212/1052 (2013.01); G06F 2212/402 (2013.01); G06F 2212/60 (2013.01); H04L 9/3247 (2013.01);
Abstract

Technologies for memory encryption include a computing device to generate a keyed hash of a data line based on a statistical counter value and a memory address to which to write the data line and to store the keyed hash to a cache line. The statistical counter value has a reference probability of incrementing at each write operation. The cache line includes a plurality of keyed hashes and each of the keyed hashes corresponds with a different data line. The computing device further encrypts the data line based on the keyed hash, the memory address, and the statistical counter value.


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