The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Oct. 16, 2018

Filed:

Aug. 07, 2017
Applicants:

Avary Holding (Shenzhen) Co., Limited., Shenzhen, CN;

Hongqisheng Precision Electronics (Qinhuangdao) Co., Ltd., Qinhuangdao, CN;

Inventors:

Ming-Jaan Ho, New Taipei, TW;

Xian-Qin Hu, Guangdong, CN;

Fu-Yun Shen, Guangdong, CN;

Wen-Zhu Wei, Guangdong, CN;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01K 3/10 (2006.01); H05K 1/11 (2006.01); H05K 3/42 (2006.01); H05K 1/09 (2006.01); H05K 3/06 (2006.01); H05K 3/02 (2006.01);
U.S. Cl.
CPC ...
H05K 1/115 (2013.01); H05K 1/09 (2013.01); H05K 3/027 (2013.01); H05K 3/067 (2013.01); H05K 3/425 (2013.01); H05K 2201/0355 (2013.01); H05K 2203/0369 (2013.01); Y10T 29/49165 (2015.01);
Abstract

A method for making a circuit board comprising: providing a silver clad laminate comprising a substrate and two silver foils; forming at least one through hole on the silver clad laminate, the through hole comprises an annular middle wall and two annular edge walls connected to two sides of the annular middle wall; forming an organic conductive film on the annular middle wall; forming a dry film pattern layer on the second area; plating copper to form a copper circuit layer on the first area, and to form a via hole in the through hole; removing the dry film pattern layer; and etching the second area of the silver foil away. The first area changes to a silver circuit layer. The copper circuit layer and the silver circuit layer define a conductive circuit layer. A circuit board made by the method is also provided.


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