The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Oct. 16, 2018

Filed:

May. 04, 2018
Applicant:

Via Technologies, Inc., New Taipei, TW;

Inventor:

Sheng-Yuan Lee, New Taipei, TW;

Assignee:

VIA TECHNOLOGIES, INC., New Taipei, TW;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 29/00 (2006.01); H01L 49/02 (2006.01); H01L 23/522 (2006.01); H01L 29/06 (2006.01); H01L 23/528 (2006.01);
U.S. Cl.
CPC ...
H01L 28/10 (2013.01); H01L 23/528 (2013.01); H01L 23/5226 (2013.01); H01L 23/5227 (2013.01); H01L 29/0619 (2013.01);
Abstract

A semiconductor device includes an insulating layer disposed over a substrate, wherein the insulating layer has a center region. A first winding portion and a second winding portion are electrically connected to the first winding portion, disposed in a first level of the insulating layer and surrounding the center region, wherein each of the first winding portion and the second winding portion comprises a plurality of conductive lines arranged from the inside to the outside. A first extending conductive line and a second extending conductive line partially surround the first extending conductive line, and are disposed in the first level of the insulating layer, wherein the first winding portion and the second winding portion surround the first extending conductive line and the second extending conductive line. A third extending conductive line is disposed in a second level of the insulating layer and surrounding the center region.


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