The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Oct. 16, 2018

Filed:

Aug. 31, 2017
Applicant:

Toshiba Memory Corporation, Minato-ku, Tokyo, JP;

Inventors:

Yoshiaki Osada, Kawasaki Kanagawa, JP;

Katsuhiko Hoya, Yokohama Kanagawa, JP;

Assignee:
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G11C 11/00 (2006.01); G06F 11/10 (2006.01); G06F 11/30 (2006.01); G11C 17/16 (2006.01); G11C 17/18 (2006.01); G11C 29/42 (2006.01); G11C 29/44 (2006.01); G11C 29/00 (2006.01); G11C 29/52 (2006.01); G11C 29/04 (2006.01);
U.S. Cl.
CPC ...
G06F 11/1068 (2013.01); G06F 11/106 (2013.01); G06F 11/3037 (2013.01); G11C 17/16 (2013.01); G11C 17/18 (2013.01); G11C 29/42 (2013.01); G11C 29/44 (2013.01); G11C 29/4401 (2013.01); G11C 29/52 (2013.01); G11C 29/785 (2013.01); G06F 2201/81 (2013.01); G06F 2201/88 (2013.01); G11C 2029/0409 (2013.01); G11C 2029/0411 (2013.01); G11C 2029/4402 (2013.01);
Abstract

According to one embodiment, a memory system includes: a first memory cell area where a first memory cell is provided; a second memory cell area where a second memory cell is provided; an ECC circuit which corrects an error of data stored by the first memory cell; and a control circuit which replaces the first memory cell with the second memory cell if the number of times an error is successfully corrected in the first memory cell reaches a first value.


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