The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Oct. 09, 2018

Filed:

Jun. 06, 2017
Applicant:

Intel Corporation, Santa Clara, CA (US);

Inventors:

Itay Almog, Ganey Tikva, IL;

Michael Kerner, Tel Mond, IL;

Avi Gazneli, Rehovot, IL;

Assignee:

Intel Corporation, Santa Clara, CA (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H03F 1/32 (2006.01); H04L 27/36 (2006.01); H04B 1/04 (2006.01);
U.S. Cl.
CPC ...
H03F 1/3241 (2013.01); H04B 1/0475 (2013.01); H04L 27/367 (2013.01); H03F 2201/3212 (2013.01); H04B 2001/0425 (2013.01);
Abstract

An apparatus to apply frequency selective digital predistortion (DPD) to a power amplifier (PA) circuit is disclosed. The apparatus comprises a first transformation circuit configured to receive a PA input comprising a quantity indicative of an input signal of the PA circuit and process the PA input by applying a first predetermined weighted function, to form a processed PA input, and a second transformation circuit configured to receive a PA output comprising a quantity indicative of an output signal of the PA circuit and process the PA output by applying a second predetermined weighted function, to form a processed PA output. The apparatus further comprises a coefficient computation circuit configured to receive the processed PA input and the processed PA output; and estimate distortion coefficients, to be utilized for predistorting the input signal of the PA circuit, based on the processed PA input and the processed PA output.


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