The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Oct. 09, 2018
Filed:
Apr. 07, 2017
Applicant:
J-devices Corporation, Oita, JP;
Inventors:
Toshiyuki Inaoka, Nomi, JP;
Atsuhiro Uratsuji, Nomi, JP;
Assignee:
J-DEVICES CORPORATION, Usuki, Oita, JP;
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 21/44 (2006.01); H01L 23/00 (2006.01);
U.S. Cl.
CPC ...
H01L 24/27 (2013.01); H01L 24/04 (2013.01); H01L 24/11 (2013.01); H01L 24/64 (2013.01); H01L 2224/03001 (2013.01); H01L 2224/03618 (2013.01); H01L 2224/03632 (2013.01);
Abstract
A manufacturing method of a semiconductor package includes locating, on a substrate, a semiconductor device having an external terminal provided on a top surface thereof, forming a resin insulating layer covering the semiconductor device, forming an opening, exposing the external terminal, in the resin insulating layer, performing plasma treatment on a bottom surface of the opening, performing chemical treatment on the bottom surface of the opening after the plasma treatment, and forming a conductive body to be connected with the external terminal exposed in the opening.