The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Oct. 09, 2018
Filed:
Mar. 29, 2017
Applicant:
Samsung Electronics Co., Ltd., Suwon-si, Gyeonggi-do, KR;
Inventors:
Mi-Hyun Kim, Seoul, KR;
Sam-Mook Kang, Hwaseong-si, KR;
Jun-Youn Kim, Hwaseong-si, KR;
Young-Jo Tak, Seongnam-si, KR;
Young-Soo Park, Yongin-si, KR;
Assignee:
Samsung Electronics Co., Ltd., Gyeonggi-do, KR;
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
C30B 25/02 (2006.01); C30B 25/18 (2006.01); H01L 21/02 (2006.01); H01L 21/78 (2006.01); C30B 25/10 (2006.01); C30B 29/40 (2006.01); C30B 29/06 (2006.01); C30B 25/16 (2006.01);
U.S. Cl.
CPC ...
C30B 25/186 (2013.01); C30B 25/02 (2013.01); C30B 25/10 (2013.01); C30B 25/16 (2013.01); C30B 25/183 (2013.01); C30B 29/06 (2013.01); C30B 29/406 (2013.01); H01L 21/0254 (2013.01); H01L 21/0262 (2013.01); H01L 21/02381 (2013.01); H01L 21/02458 (2013.01); H01L 21/02658 (2013.01); H01L 21/7806 (2013.01);
Abstract
In a method of manufacturing a GaN substrate, a capping layer may be formed on a first surface of a silicon substrate. A buffer layer may be formed on a second surface of the silicon substrate. The second surface may be opposite the first surface. A GaN substrate may be formed on the buffer layer by performing a hydride vapor phase epitaxy (HVPE) process. The capping layer and the silicon substrate may be removed.