The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Oct. 02, 2018

Filed:

Mar. 06, 2017
Applicant:

Mediatek Inc., Hsin-Chu, TW;

Inventors:

Tzu-Hung Lin, Zhubei, TW;

Cheng-Chou Hung, Hukou Township, Hsinchu County, TW;

Assignee:

MEDIATEK INC., Hsin-Chu, TW;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 27/01 (2006.01); H01L 49/02 (2006.01); H01L 23/00 (2006.01); H01L 23/66 (2006.01);
U.S. Cl.
CPC ...
H01L 28/10 (2013.01); H01L 23/66 (2013.01); H01L 24/03 (2013.01); H01L 24/08 (2013.01); H01L 24/11 (2013.01); H01L 24/13 (2013.01); H01L 24/45 (2013.01); H01L 24/48 (2013.01); H01L 2223/6677 (2013.01); H01L 2224/02181 (2013.01); H01L 2224/03912 (2013.01); H01L 2224/03914 (2013.01); H01L 2224/0401 (2013.01); H01L 2224/08123 (2013.01); H01L 2224/08265 (2013.01); H01L 2224/11019 (2013.01); H01L 2224/13022 (2013.01); H01L 2224/13083 (2013.01); H01L 2224/4502 (2013.01); H01L 2224/48463 (2013.01); H01L 2224/85007 (2013.01); H01L 2924/19011 (2013.01); H01L 2924/19042 (2013.01); H01L 2924/19051 (2013.01); H01L 2924/19103 (2013.01); H01L 2924/19104 (2013.01);
Abstract

The invention provides a semiconductor structure. The semiconductor structure includes a substrate. A first passivation layer is disposed on the substrate. A conductive pad is disposed on the first passivation layer. A second passivation layer is disposed on the first passivation layer. A conductive structure is disposed on the conductive pad, and a passive device is also disposed on the conductive pad, wherein the passive device has a first portion located above the second passivation layer and a second portion passing through the second passivation layer. A solderability preservative film covers the first portion of the passive device, and an under bump metallurgy (UBM) layer covers the second portion of the passive device and a portion of the conductive structure.


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