The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Oct. 02, 2018
Filed:
Nov. 08, 2017
Board of Regents of the University of Nebraska, Lincoln, NE (US);
Kirill D. Belashchenko, Lincoln, NE (US);
Oleg Tchernyshyov, Baltimore, MD (US);
Alexey Kovalev, Lincoln, NE (US);
Dmitri E. Nikonov, Beaverton, OR (US);
BOARD OF REGENTS OF THE UNIVERSITY OF NEBRASKA, Lincoln, NE (US);
THE JOHN HOPKINS UNIVERSITY, Baltimore, MD (US);
INTEL CORPORATION, Santa Clara, CA (US);
Abstract
A magnetoelectric memory cell with domain-wall-mediated switching is implemented using a split gate architecture. The split gate architecture allows a domain wall to be trapped within a magnetoelectric antiferromagnetic (MEAF) active layer. An extension of this architecture applies to multiple-gate linear arrays that can offer advantages in memory density, programmability, and logic functionality. Applying a small anisotropic in-plane shear strain to the MEAF can block domain wall precession to improve reliability and speed of switching.