The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Sep. 25, 2018
Filed:
Nov. 04, 2016
Applicant:
Ansys, Inc., Canonsburg, PA (US);
Inventors:
Ajay Singh Bisht, San Jose, CA (US);
Allen Baker, San Jose, CA (US);
Assignee:
Ansys, Inc., Canonsburg, PA (US);
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G06F 17/50 (2006.01);
U.S. Cl.
CPC ...
G06F 17/505 (2013.01); G06F 17/5072 (2013.01);
Abstract
An example circuit includes: a first clock gating circuit coupled between a first latch and a second latch and configured to provide a first gated clock signal based at least in part on an input clock signal. The first latch is configured to be activated in response to the first gated clock signal being at a first logic level to pass a data input. The second latch is configured to be activated in response to the input clock signal being at a second logic level to pass a first selection signal.