The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Sep. 25, 2018

Filed:

Dec. 14, 2011
Applicants:

Suleyman Sair, Chandler, AZ (US);

Elmoustapha Ould-ahmed-vall, Chandler, AZ (US);

Inventors:

Suleyman Sair, Chandler, AZ (US);

Elmoustapha Ould-Ahmed-Vall, Chandler, AZ (US);

Assignee:

Intel Corporation, Santa Clara, CA (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G06F 9/30 (2018.01); G06F 9/38 (2018.01); G06F 9/345 (2018.01); G06F 9/32 (2018.01);
U.S. Cl.
CPC ...
G06F 9/30065 (2013.01); G06F 9/30018 (2013.01); G06F 9/30036 (2013.01); G06F 9/30072 (2013.01); G06F 9/325 (2013.01); G06F 9/345 (2013.01); G06F 9/3824 (2013.01);
Abstract

A loop alignment instruction indicates a base address of an array as a first operand, an iteration limit of a loop as a second operand, and a destination. The loop contains iterations and each iteration includes a data element of the array. A processor receives the loop alignment instruction, decodes the instruction for execution, and stores a result of the execution in the destination. The result indicates the number of data elements at a beginning of the array that are to be handled separately from a remaining portion of the array, such that the base address of the remaining portion of the array aligns with an alignment width.


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